A New Current-Mode Incremental Signaling Scheme With Applications to Gb/s Parallel Links
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx5/8919/4089106/04089133.pdf?arnumber=4089133
Cited by 16 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. The analytical model for crosstalk noise of current-mode signaling in coupled RLC interconnects of VLSI circuits;Journal of Semiconductors;2017-09
2. Design techniques for decision feedback equalisation of multi‐giga‐bit‐per‐second serial data links: a state‐of‐the‐art review;IET Circuits, Devices & Systems;2014-03
3. Pseudo-balanced Signaling Using Power Transmission Lines for Parallel I/O Links;IEEE Transactions on Electromagnetic Compatibility;2013-04
4. Die-to-Die Clock Synchronization for 3-D IC Using Dual Locking Mechanism;IEEE Transactions on Circuits and Systems I: Regular Papers;2013-04
5. Modeling of Energy Dissipation in RLC Current-Mode Signaling;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2012-06
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