CML and ECL: optimized design and comparison-Reference-Cited by-同舟云学术

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CML and ECL: optimized design and comparison

Published:1999 Issue:11 Volume:46 Page:1330-1341
ISSN:1057-7122
Container-title:IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications
language:
Short-container-title:IEEE Trans. Circuits Syst. I

Author:

Alioto M.,Palumbo G.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/81/17405/00802823.pdf?arnumber=802823

Cited by 25 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. The Study on Single-Event Effects and Hardening Analysis of Frequency Divider Circuits Based on InP HBT Process;Micromachines;2024-04-15

2. Simple and Accurate Model for the Propagation Delay in MCML Gates;Electronics;2023-06-15

3. A Multi-Folded MCML for Ultra-Low-Voltage High-Performance in Deeply Scaled CMOS;IEEE Transactions on Circuits and Systems I: Regular Papers;2020-12

4. Hybrid Dynamic MCML Style: A High Speed Dynamic MCML Style;Journal of Engineering;2016

5. A 5.3-GHz 32-bit accumulator designed for direct digital frequency synthesizer;Chinese Science Bulletin;2012-06-22

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