A Combined Interface and Border Trap Model for High-Mobility Substrate Metal–Oxide–Semiconductor Devices Applied to $\hbox{In}_{0.53} \hbox{Ga}_{0.47}\hbox{As}$ and InP Capacitors-Reference-Cited by-同舟云学术

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A Combined Interface and Border Trap Model for High-Mobility Substrate Metal–Oxide–Semiconductor Devices Applied to $\hbox{In}_{0.53} \hbox{Ga}_{0.47}\hbox{As}$ and InP Capacitors

Published:2011-11 Issue:11 Volume:58 Page:3890-3897
ISSN:0018-9383
Container-title:IEEE Transactions on Electron Devices
language:
Short-container-title:IEEE Trans. Electron Devices

Author:

Brammertz Guy,Alian Alireza,Lin Dennis Han-Chung,Meuris Marc,Caymax Matty,Wang W.-E.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx5/16/6051730/06018288.pdf?arnumber=6018288

Cited by 94 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Effective suppression of interface states in recessed-gate MIS-HEMTs by TMAH wet etching;Applied Physics Express;2023-12-29

2. Effect of proton irradiation on interfacial and electrical performance of N+Np+ InP/InGaAs hetero-junction;Current Applied Physics;2023-04

3. Quantitative evaluation of plasma-damaged SiN/Si structures using bias-dependent admittance analysis;Journal of Applied Physics;2022-04-07

4. Effects of Bias and Temperature on Interface-Trap Annealing in MOS and Linear Bipolar Devices;IEEE Transactions on Nuclear Science;2022-03

5. Trap Characterization of Atomic-Layer-Deposited Al-Incorporated HfO2 Films on In0.53Ga0.47As;ACS Applied Electronic Materials;2021-09-30

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