A ReRAM-based non-volatile flip-flop with sub-VT read and CMOS voltage-compatible write
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/6568396/6573561/06573586.pdf?arnumber=6573586
Cited by 14 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Low-power and area-efficient memristor based non-volatile D latch and flip-flop: Design and analysis;PLOS ONE;2024-03-07
2. Nonvolatile D- latch and flip-flop Designs based on new Memristor Technology;2023 Eighth International Conference on Science Technology Engineering and Mathematics (ICONSTEM);2023-04-06
3. A ReRAM-based Nonvolatile FPGA;2022 IEEE 20th Student Conference on Research and Development (SCOReD);2022-11-08
4. A radiation-hardened hybrid RRAM-based non-volatile latch;Semiconductor Science and Technology;2021-07-30
5. An optimization of a non-volatile latch using memristors for sequential circuit applications;Analog Integrated Circuits and Signal Processing;2021-05-18
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