Design Space Exploration of Modular Multipliers for ASIC FHE accelerators-Reference-Cited by-同舟云学术

Design Space Exploration of Modular Multipliers for ASIC FHE accelerators

Published:2023-04-05 Issue: Volume: Page:
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Container-title:2023 24th International Symposium on Quality Electronic Design (ISQED)
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Author:

Soni Deepraj¹,Nabeel Mohammed²,Gamil Homer²,Mazonka Oleg²,Reagen Brandon¹,Karri Ramesh¹,Maniatakos Michail²

Affiliation:

1. New York University,New York,USA

2. New York University Abu Dhabi,Abu Dhabi,UAE

Funder

Defense Advanced Research Projects Agency

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10129281/10129282/10129292.pdf?arnumber=10129292

Reference34 articles.

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2. Design and Performance Comparison of Modular Multipliers Implemented on FPGA Platform

3. A custom accelerator for homomorphic encryption applications;öztürk;IEEE Transactions on Computers,2016

4. Accelerating fully homomorphic encryption over the integers with super-size hardware multiplier and modular reduction;cao,0

5. A Design and Implementation of Montgomery Modular Multiplier

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