Towards Energy-Efficient Asynchronous Circuit Design with Flip-Flop-to-Latch Replacement-Reference-Cited by-同舟云学术

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Towards Energy-Efficient Asynchronous Circuit Design with Flip-Flop-to-Latch Replacement

Published:2023-10-27 Issue: Volume: Page:
ISSN:
Container-title:2023 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)
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Author:

Xu Zeyang¹,Xiao Shanlin¹,Zhou Lingfeng¹,Wang Bohan¹,Yu Zhiyi¹

Affiliation:

1. School of Microelectronics Science and Technology, Sun Yat-sen University

Funder

Key-Area Research and Development Program of Guangdong Province

Guangdong Basic and Applied Basic Research Foundation

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10363774/10363775/10364280.pdf?arnumber=10364280

Reference5 articles.

1. A Design Flow for Click-Based Asynchronous Circuits Design With Conventional EDA Tools

2. A Low-Power Asynchronous RISC-V Processor With Propagated Timing Constraints Method

3. A High-Performance Core Micro-Architecture Based on RISC-V ISA for Low Power Applications

4. Slow and steady wins the race? A comparison of ultra-low-power RISC-V cores for Internet-of-Things applications

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Better-Than-Worst-Case: A Frequency Adaptation Asynchronous RISC-V Core With Vector Extension;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2024-06

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