1. Design and Simulation of Balanced Ternary Priority Encoder;Memories - Materials, Devices, Circuits and Systems;2024-08
2. Design and Application of Memristive Balanced Ternary Univariate Logic Circuit;Micromachines;2023-09-30
3. Design of Balanced Ternary Encoder and Decoder;2022 6th International Conference on Computing Methodologies and Communication (ICCMC);2022-03-29
4. A review on the design of ternary logic circuits*;Chinese Physics B;2021-12-01
5. A Pragmatic Quaternary FPGA Implemented with Floating Gate Memories;2021 IEEE 51st International Symposium on Multiple-Valued Logic (ISMVL);2021-05