POLAR: Performance-aware On-device Learning Capable Programmable Processing-in-Memory Architecture for Low-Power ML Applications-Reference-Cited by-同舟云学术

POLAR: Performance-aware On-device Learning Capable Programmable Processing-in-Memory Architecture for Low-Power ML Applications

Author:

Bavikadi Sathwika¹,Sutradhar Purab Ranjan²,Indovina Mark A.³,Ganguly Amlan²,Dinakarrao Sai Manoj Pudukotai¹

Affiliation:

1. George Mason University,Department of Electrical and Computer Engineering,Fairfax,USA

2. Rochester Institute of Technology,Department of Computer Engineering,Rochester,USA

3. Rochester Institute of Technology,Department of Electrical and Microelectronic Engineering,Rochester,USA

Publisher

IEEE

Link

Reference33 articles.

1. Look-up-table based processing-in-memory architecture with programmable precision-scalingfor deep learning applications;sutradhar;IEEE TPDS,2021

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2. Reconfigurable Processing-in-Memory Architecture for Data Intensive Applications;2024 37th International Conference on VLSI Design and 2024 23rd International Conference on Embedded Systems (VLSID);2024-01-06

3. Network Anomaly Detection Utilizing Machine Learning Methods;2023 IEEE East-West Design & Test Symposium (EWDTS);2023-09-22