A 80Gb/s/pin Single-Ended PAM-4 Transmitter With an Edge Boosting Auxiliary Driver and a 4-Tap FFE in 28-nm CMOS
Author:
Affiliation:
1. Yonsei University,Seoul,Korea
Funder
IC Design Education Center
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10347557/10347908/10347963.pdf?arnumber=10347963
Reference7 articles.
1. A 128-Gb/s 1.3-pJ/b PAM-4 Transmitter With Reconfigurable 3-Tap FFE in 14-nm CMOS
2. A 112-Gb/s PAM-4 Voltage-Mode Transmitter With Four-Tap Two-Step FFE and Automatic Phase Alignment Techniques in 40-nm CMOS
3. A 224-Gb/s DAC-Based PAM-4 Quarter-Rate Transmitter With 8-Tap FFE in 10-nm FinFET
4. An Output Bandwidth Optimized 200-Gb/s PAM-4 100-Gb/s NRZ Transmitter With 5-Tap FFE in 28-nm CMOS
5. A Process and Temperature Insensitive CMOS Linear TIA for 100 Gb/s/$\lambda$ PAM-4 Optical Links
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