Effect of Resistance variability in Vector Matrix Multiplication operations of 1T1R ReRAM crossbar arrays using an Embedded test platform
Author:
Affiliation:
1. College of Nanoscale Science and Engineering SUNY Polytechnic Institute,Albany,NY
2. College of Nanoscale Science and Engineering; NY CREATS SUNY Polytechnic Institute,Albany,NY
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10168132/10168044/10168152.pdf?arnumber=10168152
Reference18 articles.
1. Technological Exploration of RRAM Crossbar Array for Matrix-Vector Multiplication
2. Resistive Random Access Memory (RRAM): an Overview of Materials, Switching Mechanism, Performance, Multilevel Cell (mlc) Storage, Modeling, and Applications
3. Impact of Switching Variability, Memory Window, and Temperature on Vector Matrix Operations Using 65nm CMOS Integrated Hafnium Dioxide-based ReRAM Devices
4. In‐Memory Vector‐Matrix Multiplication in Monolithic Complementary Metal–Oxide–Semiconductor‐Memristor Integrated Circuits: Design Choices, Challenges, and Perspectives
5. Improving the Memory Window/Resistance Variability Trade-Off for 65nm CMOS Integrated HfO2 Based Nanoscale RRAM Devices
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1. Optimization of the position of TaOx:N-based barrier layer in TaOx RRAM devices;Frontiers in Materials;2024-06-03
2. PATH: Evaluation of Boolean Logic Using Path-Based In-Memory Computing Systems;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023
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