DOVA PRO: A Dynamic Overwriting Voltage Adjustment Technique for STT-MRAM L1 Cache Considering Dielectric Breakdown Effect

Author:

Chen JinboORCID,Lu Chengcheng,Ni Jiacheng,Guo XiaochenORCID,Girard PatrickORCID,Cheng YuanqingORCID

Funder

Beijing Natural Science Foundation

Science, Technology and Innovation Commission of Shenzhen Municipality

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Cited by 3 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Tight-Sketch: A High-Performance Sketch for Heavy Item-Oriented Data Stream Mining with Limited Memory Size;Proceedings of the 32nd ACM International Conference on Information and Knowledge Management;2023-10-21

2. RISC-V-Based Evaluation and Strategy Exploration of MRAM Triple-Level Hybrid Cache Systems;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-07

3. Reliability-Improved Read Circuit and Self-Terminating Write Circuit for STT-MRAM in 16 nm FinFET;2022 IEEE International Symposium on Circuits and Systems (ISCAS);2022-05-28

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