A 12-Bit Current-Steering DAC With Unary- Splitting -Binary Segmented Architecture and Improved Decoding Circuit Topology
Author:
Affiliation:
1. School of Electronics Engineering, Xi’an University of Posts and Telecommunications, Xi’an, China
2. TOLL Microelectronics, Xi’an, China
Funder
Natural Science Foundation of China
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
Link
http://xplorestaging.ieee.org/ielx7/92/9904512/09870692.pdf?arnumber=9870692
Reference19 articles.
1. An 80-MHz 8-bit CMOS D/A converter
2. A 12-bit high performance current-steering DAC using a new binary to thermometer decoder
3. Matching properties of MOS transistors
4. A 10-bit 1-GSample/s Nyquist current-steering CMOS D/A converter
5. A 12 bit 1 GS/s Dual-Rate Hybrid DAC With an 8 GS/s Unrolled Pipeline Delta-Sigma Modulator Achieving > 75 dB SFDR Over the Nyquist Band
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