Soft-Error-Aware SRAM With Multinode Upset Tolerance for Aerospace Applications

Author:

Bai Na1ORCID,Xiao Xin1ORCID,Xu Yaohua1ORCID,Wang Yi1ORCID,Wang Liang1ORCID,Zhou Xinjie2

Affiliation:

1. Information Materials and Intelligent Sensing Laboratory of Anhui Province, Anhui University, Hefei, China

2. China Electronics Technology Group Corporation No.58 Research Institute, Wuxi, China

Funder

Natural Science Foundation of the Anhui Higher Education Institutions of China

Open Research Fund of National Engineering Research Center for Agro-Ecological Big Data Analysis and Application, Anhui University

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A Single Bitline Highly Stable, Low Power With High Speed Half-Select Disturb Free 11T SRAM Cell;ACM Transactions on Design Automation of Electronic Systems;2024-07-09

2. A High Critical Charge 16T Soft-Error-Aware SRAM for Aerospace Applications;2024 2nd International Symposium of Electronics Design Automation (ISEDA);2024-05-10

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