Author:
Gupta Pallav,Zhang Rui,Jha Niraj K.
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
Cited by
6 articles.
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1. Don’t-Care-Based Logic Optimization for Threshold Logic;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-09
2. 1st-Order to 2nd-Order Threshold Logic Gate Transformation with an Enhanced ILP-based Identification Method;Proceedings of the 26th Asia and South Pacific Design Automation Conference;2021-01-18
3. Optimization of Threshold Logic Networks with Node Merging and Wire Replacement;ACM Transactions on Design Automation of Electronic Systems;2019-11-14
4. Nanotechnologies Testing;Nanoelectronics;2017-04-07
5. ATPG for Delay Defects in Current Mode Threshold Logic Circuits;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2016-11