A Reconfigurable Multiple Transform Selection Architecture for VVC

Author:

Hao Zhijian1ORCID,Sun Heming2ORCID,Xiang Guoqing3ORCID,Zhang Peng3,Zeng Xiaoyang1,Fan Yibo1ORCID

Affiliation:

1. State Key Laboratory of ASIC and System, Fudan University, Shanghai, China

2. Waseda Research Institute for Science and Engineering, Tokyo, Japan

3. Advanced Institute of Information Technology, Peking University, Hangzhou, China

Funder

National Natural Science Foundation of China

Alibaba Innovative Research (AIR) Program

Fudan-ZTE Joint Laboratory

CCF-Alibaba Innovative Research Fund for Young Scholars

Japan Science and Technology Agency

Japan Society for the Promotion of Science

Kenjiro Takayanagi Foundation

Foundation of Ando Laboratory.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

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1. Parallelized RDOQ Algorithm and Fully Pipelined Hardware Architecture for AVS3 Video Coding;IEEE Transactions on Circuits and Systems for Video Technology;2024-07

2. Fast Transform Kernel Selection Based on Frequency Matching and Probability Model for AV1;IEEE Transactions on Broadcasting;2024-06

3. Efficient 2D transform hardware architecture for the versatile video coding standard;Journal of Visual Communication and Image Representation;2024-06

4. FPGA-based implementation of the VVC low-frequency non-separable transform;Journal of Real-Time Image Processing;2024-05-18

5. Hardware architecture optimization for high-frequency zeroing and LFNST in H.266/VVC based on FPGA;Journal of Real-Time Image Processing;2024-05-11

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