Novel Shared Multiplier Scheduling Scheme for Area-Efficient FFT/IFFT Processors-Reference-Cited by-同舟云学术

Novel Shared Multiplier Scheduling Scheme for Area-Efficient FFT/IFFT Processors

Published:2015-09 Issue:9 Volume:23 Page:1689-1699
ISSN:1063-8210
Container-title:IEEE Transactions on Very Large Scale Integration (VLSI) Systems
language:
Short-container-title:IEEE Trans. VLSI Syst.

Author:

Kim Eun Ji,Lee Jea Hack,Sunwoo Myung Hoon

Funder

Mid-Career Researcher Program through the Ministry of Science, ICT and Future Planning, National Research Foundation

IT Research and Development Program through the Ministry of Trade Industry and Energy, Korea Evaluation Institute of Industry Technology, Seoul, Korea

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Link

http://xplorestaging.ieee.org/ielx7/92/7217857/06892965.pdf?arnumber=6892965

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