Implementation of Multiple-Step Quantized STDP Based on Novel Memristive Synapses-Reference-Cited by-同舟云学术

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Implementation of Multiple-Step Quantized STDP Based on Novel Memristive Synapses

Published:2024-08 Issue:8 Volume:32 Page:1369-1379
ISSN:1063-8210
Container-title:IEEE Transactions on Very Large Scale Integration (VLSI) Systems
language:
Short-container-title:IEEE Trans. VLSI Syst.

Author:

Liu Yi-Fan¹^ORCID,Wang Da-Wei¹^ORCID,Dong Zhe-Kang¹^ORCID,Xie Hao²^ORCID,Zhao Wen-Sheng¹

Affiliation:

1. Zhejiang Provincial Key Laboratory of Large-Scale Integrated Circuits Design, School of Electronics and Information, Hangzhou Dianzi University, Hangzhou, China

2. School of Information and Electrical Engineering, Zhejiang University City College, Hangzhou, China

Funder

Natural Science Foundation of Zhejiang Province

National Natural Science Foundation of China

Fundamental Research Funds for the Provincial Universities of Zhejiang

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Link

http://xplorestaging.ieee.org/ielx7/92/10609530/10520271.pdf?arnumber=10520271

Reference44 articles.

1. Efficient Neuromorphic Hardware Through Spiking Temporal Online Local Learning

2. A Training-Efficient Hybrid-Structured Deep Neural Network With Reconfigurable Memristive Synapses

3. Full CMOS Circuit for Brain-Inspired Associative Memory With On-Chip Trainable Memristive STDP Synapse

4. SNIB: Improving Spike-Based Machine Learning Using Nonlinear Information Bottleneck

5. NADOL: Neuromorphic Architecture for Spike-Driven Online Learning by Dendrites

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