Author:
Riho Yoshiro,Nakazato Kazuo
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
Cited by
6 articles.
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1. The analogy of matchline sensing techniques for content addressable memory (CAM);IET Computers & Digital Techniques;2020-04
2. A predischarged bitline 1T-1C DRAM readout scheme;Microelectronics Journal;2019-01
3. A Low-Overhead Dynamic TCAM With Pipelined Read-Restore Refresh Scheme;IEEE Transactions on Circuits and Systems I: Regular Papers;2018-05
4. Maximizing Common Idle Time on Multicore Processors With Shared Memory;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2017-07
5. Power model analysis using variable rate clock network in CMOS processor;Proceedings of the 7th International Conference on Computing Communication and Networking Technologies;2016-07-06