Low-Power Mixed-Signal CVNS-Based 64-Bit Adder for Media Signal Processing

Author:

Mirhassani M.,Ahmadi M.,Jullien G.A.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Cited by 6 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. An Analog CVNS-Based Sigmoid Neuron for Precise Neurochips;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2017-03

2. Robust Analog Arithmetic Based on the Continuous Valued Number System;Embedded Systems Design with Special Arithmetic and Number Systems;2017

3. A Prototype CVNS Distributed Neural Network Using Synapse-Neuron Modules;IEEE Transactions on Circuits and Systems I: Regular Papers;2012-07

4. ERROR RECOVERY IN CONTINUOUS VALUED NUMBER SYSTEM;Journal of Circuits, Systems and Computers;2011-12

5. Resistive-Type CVNS Distributed Neural Networks With Improved Noise-to-Signal Ratio;IEEE Transactions on Circuits and Systems II: Express Briefs;2010-10

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