Author:
Moo-Young Kim ,Dongsuk Shin ,Hyunsoo Chae ,Chulwoo Kim
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
Cited by
10 articles.
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1. A 0.5-V all-digital clock-deskew buffer with I/Q phase outputs;Analog Integrated Circuits and Signal Processing;2017-06-29
2. A Synchronous Mirror Delay with Duty-Cycle Tunable Technology;2015 IEEE 18th International Symposium on Design and Diagnostics of Electronic Circuits & Systems;2015-04
3. An IR-UWB Transmitter for Ranging Systems;IEEE Transactions on Circuits and Systems II: Express Briefs;2013-11
4. An All-Digital Clock Synchronization Buffer With One Cycle Dynamic Synchronizing;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2012-10
5. Optically-Clocked Instruction Set Extensions for High Efficiency Embedded Processors;IEEE Transactions on Circuits and Systems I: Regular Papers;2012-03