Hybrid Accumulator Factored Systolic Array for Machine Learning Acceleration-Reference-Cited by-同舟云学术

Hybrid Accumulator Factored Systolic Array for Machine Learning Acceleration

Published:2022-07 Issue:7 Volume:30 Page:881-892
ISSN:1063-8210
Container-title:IEEE Transactions on Very Large Scale Integration (VLSI) Systems
language:
Short-container-title:IEEE Trans. VLSI Syst.

Author:

Inayat Kashif¹^ORCID,Chung Jaeyong¹^ORCID

Affiliation:

1. Department of Electronics Engineering, Incheon National University, Incheon, South Korea

Funder

Software Systems for AI Semiconductor Design Project

Neuromorphic Computing Software Platform for Artificial Intelligence Systems Project through the Institute of Information and Communications Technology Planning and Evaluation

Korea Government Ministry of Science and Information Communication Technology

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Link

http://xplorestaging.ieee.org/ielx7/92/9809833/09773321.pdf?arnumber=9773321

Reference47 articles.

1. A Survey of Accelerator Architectures for Deep Neural Networks

2. SCALE-Sim: Systolic CNN accelerator simulator;samajdar;arXiv 1811 02883,2018

3. A Multiple-Precision Multiply and Accumulation Design with Multiply-Add Merged Strategy for AI Accelerating

4. Tetris

5. Low Complexity Multiply-Accumulate Units for Convolutional Neural Networks with Weight-Sharing

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