Integrated MAC-based Systolic Arrays: Design and Performance Evaluation

Author:

Devi Dantu Nandini1ORCID,Ajay Kumar Gandi1ORCID,G Gowda Bindu1ORCID,Rao Madhav2ORCID

Affiliation:

1. Electronics and Communication Engineering, International Institute of Information Technology Bangalore, India

2. Electronics and Communication, International Institute of Information Technology Bangalore, India

Publisher

ACM

Reference23 articles.

1. ERIDANUS: Efficiently Running Inference of DNNs Using Systolic Arrays

2. Eyeriss: An Energy-Efficient Reconfigurable Accelerator for Deep Convolutional Neural Networks

3. Some schemes for parallel multipliers;L.;Alta Frequenza,1965

4. Applications of Artificial Intelligence in Machine Learning: Review and Prospect

5. [5] Dantu Nandini Devi. 2024. https://sites.google.com/view/exactisa/homeAccessed on January 10, 2024.

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