A 6.25-MHz 3.4-mW Single Clock DPWM Technique Using Matrix Shift Array-Reference-Cited by-同舟云学术

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A 6.25-MHz 3.4-mW Single Clock DPWM Technique Using Matrix Shift Array

Published:2024-05 Issue:5 Volume:32 Page:972-976
ISSN:1063-8210
Container-title:IEEE Transactions on Very Large Scale Integration (VLSI) Systems
language:
Short-container-title:IEEE Trans. VLSI Syst.

Author:

Jose Oliver Lexter July A.¹^ORCID,Kolakaluri Venkata Naveen¹,Sangalang Ralph Gerard B.¹^ORCID,Tolentino Lean Karlo S.¹^ORCID,Wang Chua-Chin²^ORCID

Affiliation:

1. Department of Electrical Engineering, National Sun Yat-sen University, Kaohsiung, Taiwan

2. Department of Electrical Engineering, Institute of Undersea Technology, National Sun Yat-sen University, Kaohsiung, Taiwan

Funder

National Science and Technology Council

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Link

http://xplorestaging.ieee.org/ielx7/92/10508545/10445309.pdf?arnumber=10445309

Reference16 articles.

1. Fine Resolution DPWM Circuit for High Frequency Digital Control DC-DC Converter

2. Digital PWM controller for high-frequency low-power DC-DC switching mode power supply

3. A 50 nW-to-10 mW Output Power Tri-Mode Digital Buck Converter With Self-Tracking Zero Current Detection for Photovoltaic Energy Harvesting

4. Single-chip DC–DC buck converter design based on PWM with high-efficiency in light load

5. A high-resolution digital PWM controller using capacitor integration

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