Single-chip DC–DC buck converter design based on PWM with high-efficiency in light load-Reference-Cited by-同舟云学术

Single-chip DC–DC buck converter design based on PWM with high-efficiency in light load

Author:

Wang Chua-Chin¹²,Jose Oliver Lexter July A.¹,Lou Pang-Yen¹,Hsu Chung-Jye¹,Tolentino Lean Karlo S.¹³,Sangalang Ralph Gerard B.¹⁴^ORCID

Affiliation:

1. Department of Electrical Engineering, National Sun Yat-Sen University, Kaohsiung, Taiwan

2. Institute of Undersea Technology, National Sun Yat-Sen University, Kaohsiung, Taiwan

3. Department of Electronics Engineering, Technological University of the Philippines, Ermita, Philippines

4. Department of Electronics Engineering, Batangas State University, Batangas City, Philippines

Funder

Ministry of Science and Technology (MOST), Taiwan

Publisher

Informa UK Limited

Subject

Electrical and Electronic Engineering,Computer Networks and Communications,Instrumentation,Electronic, Optical and Magnetic Materials

Link

Reference17 articles.

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A 6.25-MHz 3.4-mW Single Clock DPWM Technique Using Matrix Shift Array;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2024-05

2. Three-level DC-DC Buck Converter Architecture Using Digital Pulse Width Modulation;2023 IEEE Symposium on Industrial Electronics & Applications (ISIEA);2023-07-15