A Single-Chip 4K 60-fps 4:2:2 HEVC Video Encoder LSI Employing Efficient Motion Estimation and Mode Decision Framework With Scalability to 8K
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
Link
http://xplorestaging.ieee.org/ielx7/92/8472222/08388869.pdf?arnumber=8388869
Cited by 12 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
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4. A High-Throughput Hardware Design for the AV1 Decoder Intraprediction;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-04
5. A Partitioned Memory Architecture with Prefetching for Efficient Video Encoders;Parallel and Distributed Computing, Applications and Technologies;2023
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