A High-Speed Floating-Point Multiply-Accumulator Based on FPGAs-Reference-Cited by-同舟云学术

A High-Speed Floating-Point Multiply-Accumulator Based on FPGAs

Published:2021-10 Issue:10 Volume:29 Page:1782-1789
ISSN:1063-8210
Container-title:IEEE Transactions on Very Large Scale Integration (VLSI) Systems
language:
Short-container-title:IEEE Trans. VLSI Syst.

Author:

Zhou Bin^ORCID,Wang Guangsen,Jie Guisheng,Liu Qing,Wang Zhiwei

Funder

National Natural Science Foundation of China

Key Laboratory of Equipment Pre-Research Foundation of China

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Link

Cited by 5 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. FPGA Implementation of a High Speed Efficient Single Precision Floating Point ALU;2023 International Conference on Control, Communication and Computing (ICCC);2023-05-19

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3. Design and Analysis of Posit Quire Processing Engine for Neural Network Applications;2023 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems (VLSID);2023-01