A 7T1R Nonvolatile SRAM with High Stability, Low Delay and Low Power Consumption Embedded with Transmission Gates (TGs)
Author:
Affiliation:
1. Dalian University of Technology,School of Mechanical Engineering,Liaoning Dalian,China,116024
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9962815/9963138/09963337.pdf?arnumber=9963337
Reference8 articles.
1. Low Store Energy, Low VDDmin, 8T2R Nonvolatile Latch and SRAM With Vertical-Stacked Resistive Memory (Memristor) Devices for Low Power Mobile Applications
2. Design of a Nonvolatile 7T1R SRAM Cell for Instant-on Operation
3. Design of Hybrid CMOS Non-Volatile SRAM Cells in 130nm RRAM Technology
Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Store and Restore Delay Reduction Techniques of Non-volatile SRAM cells;2023 International Conference on Sustainable Computing and Smart Systems (ICSCSS);2023-06-14
2. Process invariant Schmitt Trigger non-volatile 13T1M SRAM cell;Microelectronics Journal;2023-05
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