A Design of Power-Efficient AES Algorithm on Artix-7 FPGA for Green Communication-Reference-Cited by-同舟云学术

A Design of Power-Efficient AES Algorithm on Artix-7 FPGA for Green Communication

Published:2021-11-10 Issue: Volume: Page:
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Container-title:2021 International Conference on Technological Advancements and Innovations (ICTAI)
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Author:

Kumar Keshav,Kaur Amanpreet,Ramkumar K. R.,Shrivastava Anurag,Moyal Vishal,Kumar Yogendra

Publisher

IEEE

Link

Reference21 articles.

3. An Efficient Hardware design and Implementation of Advanced Encryption Standard (AES) Algorithm;singh;IACR Cryptology ePrint Archive,2016

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