A novel 3D IC assembly process for ultra-thin chip stacking-Reference-Cited by-同舟云学术

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A novel 3D IC assembly process for ultra-thin chip stacking

Published:2014-04 Issue: Volume: Page:
ISSN:
Container-title:2014 International Conference on Electronics Packaging (ICEP)
language:
Short-container-title:

Author:

Yu-Min Lin ,Chau-Jie Zhan ,Zhi-Cheng Hsiao ,Huan-Chun Fu ,Ren-Shin Cheng ,Yu-Wei Huang ,Shin-Yi Huang ,Su-Mei Chen ,Chia-Wen Fan ,Chun-Hsien Chien ,Cheng-Ta Ko ,Yu-Huan Guo ,Chang-Chun Lee ,Tsutsumi Yoshihiro,Junsoo Woo ,Suzuki Yoshikazu,Sato Yusuke,Chien-Ting Liu ,Chih-Heng Chao

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/6821728/6826643/06826723.pdf?arnumber=6826723

Cited by 3 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Ultra-Thin Chips With ISFET Array for Continuous Monitoring of Body Fluids Ph;IEEE Transactions on Biomedical Circuits and Systems;2021-12

2. Embedding of Ultrathin Chips in Highly Flexible, Photosensitive Solder Mask Resist;Micromachines;2021-07-21

3. Three-point-support method based on position determination of supports and wafers to eliminate gravity-induced deflection of wafers;Precision Engineering;2016-10

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