A Hybrid Approach to Automated Power and IR drop reduction and Classification using Support Vector Machines
Author:
Affiliation:
1. Electronics and Communication Engineering, St. Thomas' College of Engineering and Technology,Kolkata,India
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10126138/10126139/10126771.pdf?arnumber=10126771
Reference15 articles.
1. A circuit technique for leakage power reduction in CMOS VLSI circuits
2. Reduction of leakage current and power in full subtractor using MTCMOS technique
3. Test Pattern Modification for Average IR-Drop Reduction
4. IR Drop Estimation and Optimization on DRAM Memory using Machine Learning Algorithms
5. Dynamic and Leakage Power Reduction in MTCMOS Circuits Using an Automated Efficient Gate Clustering;anis;Proceedings of the 39th Design Automation Conference,0
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