Low power design techniques and implementation strategies adopted in VLSI circuits-Reference-Cited by-同舟云学术

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Low power design techniques and implementation strategies adopted in VLSI circuits

Published:2017-09 Issue: Volume: Page:
ISSN:
Container-title:2017 IEEE International Conference on Power, Control, Signals and Instrumentation Engineering (ICPCSI)
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Author:

Padmavathi B.,Geetha B. T.,Bhuvaneshwari K.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/8385064/8391768/08392017.pdf?arnumber=8392017

Cited by 10 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Timing ECO Approach Addressing Clock Gating Cells for Anti-Aging Purposes to Save Runtime;2023 International Conference on Electrical, Computer and Energy Technologies (ICECET);2023-11-16

2. The Application of MUX in the Realming of Domino Logic, Dynamic Consequently, and Transmission Gates: A Case Study with Performance Calculation;2023 First International Conference on Advances in Electrical, Electronics and Computational Intelligence (ICAEECI);2023-10-19

3. Implementing Logical Shifters: For Funtionality Testing and Performance of Power Analysis;2023 3rd Asian Conference on Innovation in Technology (ASIANCON);2023-08-25

4. Study of Energy and Power Consumption of Rough Set Theory unit on FPGA;2022 International Conference on Industry 4.0 Technology (I4Tech);2022-09-23

5. Novel Power Gated (PG) and Sleep Body Bias (SBB) 6T CNTFET-Based SRAM Design for Ultra-Low-Power Application;Lecture Notes in Electrical Engineering;2022-09-04

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