Edge Termination Design Considerations for 1.2kV 4H-SiC MOSFETs While Utilizing Room Temperature Ion Implantations
Author:
Affiliation:
1. University at Albany, State University of New York,College of Nanoscale Science and Engineering,Albany,NY,USA,12203
2. Stoney Brook University,Department of Material Science and Chemical Engineering,Stoney Brook,NY,USA,11794
Funder
National Renewable Energy Laboratory
U.S. Department of Energy
Advanced Manufacturing Office
Argonne National Laboratory
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10382185/10382163/10382208.pdf?arnumber=10382208
Reference9 articles.
1. Fundamentals of Power Semiconductor Devices
2. A New Degradation Mechanism in High-Voltage SiC Power MOSFETs
3. Static Performance and Reliability of 4H-SiC Diodes with P+ Regions Formed by Various Profiles and Temperatures
4. Advancing Static Performance and Ruggedness of 600 V SiC MOSFETs: Experimental Analysis and Simulation Study
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