Design of Testable Universal Logic Gate Targeting Minimum Wire-Crossings in QCA Logic Circuit-Reference-Cited by-同舟云学术

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Design of Testable Universal Logic Gate Targeting Minimum Wire-Crossings in QCA Logic Circuit

Published:2010-09 Issue: Volume: Page:
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Container-title:2010 13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools
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Author:

Sen Bibhash,Sengupta Anik,Dalui Mamata,Sikdar Biplab K.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/5613535/5615428/05615535.pdf?arnumber=5615535

Cited by 16 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Predicting Energy Dissipation in QCA-Based Layered-T Gates Under Cell Defects and Polarisation: A Study with Machine-Learning Models;Journal of Electronic Testing;2024-08-21

2. An Ultra-Energy-Efficient Reversible Quantum-Dot Cellular Automata 8:1 Multiplexer Circuit;Quantum Reports;2024-01-16

3. Reversible Quantum-Dot Cellular Automata-Based Arithmetic Logic Unit;Nanomaterials;2023-08-29

4. Novel ultra-energy-efficient reversible designs of sequential logic quantum-dot cellular automata flip-flop circuits;The Journal of Supercomputing;2023-03-01

5. A novel design approach for T‐XOR gate in ternary quantum‐dot cellular automata circuits;International Journal of Numerical Modelling: Electronic Networks, Devices and Fields;2022-08-26

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