Side-Channel Attack Counteraction via Machine Learning-Targeted Power Compensation for Post-Silicon HW Security Patching
Author:
Affiliation:
1. National University of Singapore,Singapore,Singapore
Funder
Singapore National Research Foundation
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9731529/9731102/09731755.pdf?arnumber=9731755
Reference10 articles.
1. Secure AES engine with a local switched-capacitor current equalizer
2. Machine Learning Assisted Side-Channel-Attack Countermeasure and Its Application on a 28-nm AES Circuit
3. An EM/Power SCA-Resilient AES-256 with Synthesizable Signature Attenuation Using Digital-Friendly Current Source and RO-Bleed-Based Integrated Local Feedback and Global Switched-Mode Control;ghosh;ISSCC,2021
4. 25.3 A 128b AES Engine with Higher Resistance to Power and Electromagnetic Side-Channel Attacks Enabled by a Security-Aware Integrated All-Digital Low-Dropout Regulator
5. 8.1 Improved power-side-channel-attack resistance of an AES-128 core via a security-aware integrated buck voltage regulator
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1. EMSim+: Accelerating Electromagnetic Security Evaluation with Generative Adversarial Network;2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD);2023-10-28
2. Pareto Frequency-Aware Power Side-Channel Countermeasure Exploration on CNN Systolic Array;IEEE Transactions on Circuits and Systems II: Express Briefs;2023-03
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4. Aggressive Design Reuse for Ubiquitous Zero-Trust Edge Security—From Physical Design to Machine-Learning-Based Hardware Patching;IEEE Open Journal of the Solid-State Circuits Society;2023
5. Optimal Energy Efficient Design of Artificial Noise to Prevent Side-Channel Attacks;2022 IEEE International Workshop on Information Forensics and Security (WIFS);2022-12-12
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