A 100MHz-Reference, 8GHz/16GHz, 177fsrms/223fsrms RO-Based IL-ADPLL Incorporating Reference Octupler with Probability-Based Fast Phase-Error Calibration
Author:
Affiliation:
1. Seoul National University,Seoul,Korea
2. University of California,Berkeley,CA
3. Columbia University,New York,NY
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9731529/9731102/09731714.pdf?arnumber=9731714
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1. Design of Crystal-Oscillator Frequency Quadrupler for Low-Jitter Clock Multipliers
2. A 900 MHz local oscillator using a DLL-based frequency multiplier technique for PCS applications
3. A Fractional-N Synthesizer with 110fsrms Jitter and a Reference Quadrupler for Wide band 802.11 ax;song;ISSCC,2019
4. A Low-Noise Frequency Synthesizer Using Multiphase Generation and Combining Techniques
5. A variable step size LMS algorithm
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1. A Multireference PLL: Theory and Implementation;IEEE Journal of Solid-State Circuits;2024-07
2. A Fractional-N Ring PLL Using Harmonic-Mixer-Based Dual-Feedback and Split-Feedback Frequency Division With Phase-Domain Filtering;IEEE Journal of Solid-State Circuits;2024-07
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