Efficient High Level Synthesis Exploration Methodology Combining Exhaustive and Gradient-Based Pruned Searching-Reference-Cited by-同舟云学术

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Efficient High Level Synthesis Exploration Methodology Combining Exhaustive and Gradient-Based Pruned Searching

Published:2010-07 Issue: Volume: Page:
ISSN:
Container-title:2010 IEEE Computer Society Annual Symposium on VLSI
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Author:

Xydis Sotirios,Skouroumounis Christos,Pekmestzi Kiamal,Soudris Dimitrios,Economakos George

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/5570021/5571793/05571801.pdf?arnumber=5571801

Cited by 16 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Investigating the Effect of Hyper-Parameter Settings on Simulated Annealing-Based High-Level Synthesis Design Space Exploration;2024 IEEE 17th Dallas Circuits and Systems Conference (DCAS);2024-04-19

2. Fast and Inexpensive High-Level Synthesis Design Space Exploration: Machine Learning to the Rescue;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-11

3. FADO: F loorplan- A ware D irective O ptimization for High-Level Synthesis Designs on Multi-Die FPGAs;Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays;2023-02-12

4. Efficient System-Level Design Space Exploration for High-Level Synthesis Using Pareto-Optimal Subspace Pruning;Proceedings of the 28th Asia and South Pacific Design Automation Conference;2023-01-16

5. N-PIR: A Neighborhood-Based Pareto Iterative Refinement Approach for High-Level Synthesis;Arabian Journal for Science and Engineering;2022-08-20

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