FADO: F loorplan- A ware D irective O ptimization for High-Level Synthesis Designs on Multi-Die FPGAs-Reference-Cited by-同舟云学术

FADO: F loorplan- A ware D irective O ptimization for High-Level Synthesis Designs on Multi-Die FPGAs

Published:2023-02-12 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 2023 ACM/SIGDA International Symposium on Field Programmable Gate Arrays
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Author:

Du Linfeng¹^ORCID,Liang Tingyuan¹^ORCID,Sinha Sharad²^ORCID,Xie Zhiyao¹^ORCID,Zhang Wei¹^ORCID

Affiliation:

1. Hong Kong University of Science and Technology, Kowloon, Hong Kong

2. Indian Institute of Technology Goa, Goa, India

Funder

Hong Kong Research Grants Council

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3543622.3573188

Reference46 articles.

1. Heuristic Solutions for the Multiple-Choice Multi-dimension Knapsack Problem

2. Elastic-DF: Scaling performance of DNN inference in FPGA clouds through automatic partitioning;Alonso Tobias;ACM Transactions on Reconfigurable Technology and Systems (TRETS),2021

3. VPR: a new packing, placement and routing tool for FPGA research

4. Assembly and reliability challenges in 3D integration of 28nm FPGA die on a large high density 65nm passive interposer

5. PolySA

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1. PASTA: Programming and Automation Support for Scalable Task-Parallel HLS Programs on Modern Multi-Die FPGAs;ACM Transactions on Reconfigurable Technology and Systems;2024-08-05

2. FADO: Floorplan-Aware Directive Optimization Based on Synthesis and Analytical Models for High-Level Synthesis Designs on Multi-Die FPGAs;ACM Transactions on Reconfigurable Technology and Systems;2024-03-20

3. Lightning Talk: The Next Wave of High-level Synthesis;2023 60th ACM/IEEE Design Automation Conference (DAC);2023-07-09