MOS Current Mode Logic (MCML) based techniques for D-Flip Flop in 180 nm Technology using LTspice-Reference-Cited by-同舟云学术

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MOS Current Mode Logic (MCML) based techniques for D-Flip Flop in 180 nm Technology using LTspice

Published:2023-02-24 Issue: Volume: Page:
ISSN:
Container-title:2023 2nd Edition of IEEE Delhi Section Flagship Conference (DELCON)
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Author:

Dhull Ajay¹,Vinitha C.S.¹,Mittal Ashok¹

Affiliation:

1. Netaji Subhas University of Technology,Electronics and Communication Engineering,New Delhi,India

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10127221/10127228/10127334.pdf?arnumber=10127334

Reference8 articles.

1. Design of Low-Voltage Power Efficient Frequency Dividers in Folded MOS Current Mode Logic

2. A Low-Voltage High-Performance Frequency Divider exploiting Folded MCML

3. Back to the Future: Current-Mode Processor in the Era of Deeply Scaled CMOS

4. A Dynamic Current Mode D-Flipflop for High Speed Application

5. Low power D-latch design using MCML tri-state buffers

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