Resistive RAM-Centric Computing: Design and Modeling Methodology-Reference-Cited by-同舟云学术

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Resistive RAM-Centric Computing: Design and Modeling Methodology

Published:2017-09 Issue:9 Volume:64 Page:2263-2273
ISSN:1549-8328
Container-title:IEEE Transactions on Circuits and Systems I: Regular Papers
language:
Short-container-title:IEEE Trans. Circuits Syst. I

Author:

Li Haitong^ORCID,Wu Tony F.,Mitra Subhasish,Wong H.-S. Philip

Funder

NSF-SRC E2CDA

NSF NCN NEEDS

Stanford SystemX Alliance

STARnet SONIC

Member Companies through the Stanford Non-Volatile Memory Technology Research Initiative

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://ieeexplore.ieee.org/ielaam/8919/8017677/7950949-aam.pdf

Cited by 54 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

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3. High-Performance Top-Gated and Double-Gated Oxide–Semiconductor Ferroelectric Field-Effect Transistor Enabled by Channel Defect Self-Compensation Effect;IEEE Transactions on Electron Devices;2023-04

4. Double magnetic tunnel junction two bit memory and nonvolatile logic for in situ computing;Microelectronics Journal;2023-01

5. A Robust Time-Based Multi-Level Sensing Circuit for Resistive Memory;IEEE Transactions on Circuits and Systems I: Regular Papers;2023-01

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