Author:
Lapshev Stepan,Hasan S. M. Rezaul
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Cited by
23 articles.
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1. Power Efficiency Evaluation of Dual Edge Triggered Flip-Flops - A Comparative Analysis;2024 7th International Conference on Devices, Circuits and Systems (ICDCS);2024-04-23
2. Review of Dual-Edge Triggered Low-Power D Flip-Flops;2023 3rd International Conference on Smart Generation Computing, Communication and Networking (SMART GENCON);2023-12-29
3. Comparative Analysis of Dual-edge Triggered and Sense Amplifier Based Flip-flops in 32 nm CMOS Regime;2023 International Conference in Advances in Power, Signal, and Information Technology (APSIT);2023-06-09
4. Power and Area Efficient Sense Amplifier Based Flip Flop with Wide Voltage and Temperature Upholding for Portable IoT Applications;Informacije MIDEM - Journal of Microelectronics, Electronic Components and Materials;2023-05-24
5. Low-Power Redundant-Transition-Free TSPC Dual-Edge-Triggering Flip-Flop Using Single-Transistor-Clocked Buffer;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-05