A 14-bit 250 MS/s IF Sampling Pipelined ADC in 180 nm CMOS Process-Reference-Cited by-同舟云学术

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A 14-bit 250 MS/s IF Sampling Pipelined ADC in 180 nm CMOS Process

Published:2016-09 Issue:9 Volume:63 Page:1381-1392
ISSN:1549-8328
Container-title:IEEE Transactions on Circuits and Systems I: Regular Papers
language:
Short-container-title:IEEE Trans. Circuits Syst. I

Author:

Zheng Xuqiang,Wang Zhijun,Li Fule,Zhao Feng,Yue Shigang,Zhang Chun,Wang Zhihua

Funder

National High Technology Research and Development Program of China (863 Program)

European FP7 project: LIVECODE

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/8919/7559957/07542202.pdf?arnumber=7542202

Cited by 41 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A 12bit 1.6 GS/s pipelined ADC with multi-level dither injection achieving 68 dB SFDR over PVT;Microelectronics Journal;2024-01

2. Analysis and Design of Calibration Technique for Capacitor Mismatch in SAR ADCs;2023 5th International Conference on Circuits and Systems (ICCS);2023-10-27

3. A 5.3-fJ/conv.-step Pipelined-SAR ADC with Resistance Assisted Two-Stage Dynamic Amplifier Based on Gm-Unit;2023 8th International Conference on Integrated Circuits and Microsystems (ICICM);2023-10-20

4. A Multi-Dimensional Calibration Based on Genetic Algorithm in a 12-Bit 750 MS/s Pipelined ADC;Micromachines;2023-09-05

5. A Wide Input Common-mode Range Pipelined ADC Front-end with Common-mode Refreshing;2023 21st IEEE Interregional NEWCAS Conference (NEWCAS);2023-06-26

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