Synchronous Non-Volatile Logic Gate Design Based on Resistive Switching Memories-Reference-Cited by-同舟云学术

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Synchronous Non-Volatile Logic Gate Design Based on Resistive Switching Memories

Published:2014-02 Issue:2 Volume:61 Page:443-454
ISSN:1549-8328
Container-title:IEEE Transactions on Circuits and Systems I: Regular Papers
language:
Short-container-title:IEEE Trans. Circuits Syst. I

Author:

Zhao Weisheng,Moreau Mathieu,Deng Erya,Zhang Yue,Portal Jean-Michel,Klein Jacques-Olivier,Bocquet Marc,Aziza Hassen,Deleruyelle Damien,Muller Christophe,Querlioz Damien,Ben Romdhane Nesrine,Ravelosona Dafine,Chappert Claude

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/8919/6722960/06585773.pdf?arnumber=6585773

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