Funder
VLSI Design and Education Center, University of Tokyo in collaboration with Cadence Design Systems, Inc. and Mentor Graphics, Inc., JSPS KAKENHI
New Energy and Industrial Technology Development Organization
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Cited by
32 articles.
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1. Full-Swing Nanosecond Delay Hybrid Level Shifter for Time-Critical Applications;Electronics;2024-06-30
2. Input Voltage-Level Driven Split-Input Inverter Level Shifter for Nanoscale Applications;Electronics;2024-03-18
3. Current Mirror based Level Shifter aiding multitudinous conversion ranges;2024 International Conference on Integrated Circuits and Communication Systems (ICICACS);2024-02-23
4. A New 22 nm ULPLS Architecture to Detect 70 mV Minimum Input, Suitable for IOT Applications;2023 7th International Conference on Electronics, Materials Engineering & Nano-Technology (IEMENTech);2023-12-18
5. Robust Body Biased Level Shifter;2023 IEEE International Conference on Distributed Computing, VLSI, Electrical Circuits and Robotics (DISCOVER);2023-10-13