Fault Tolerance on NoCs

Author:

Montanana J. M.,de Andres D.,Tirado F.

Publisher

IEEE

Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Cycle-accurate multi-FPGA platform for accelerated emulation of large on-chip networks;The Journal of Supercomputing;2024-06-23

2. Virtual Coordinate System Based on a Circulant Topology for Routing in Networks-On-Chip;Symmetry;2024-01-21

3. Routing in circulant graphs based on a virtual coordinate system;Uchenye Zapiski Kazanskogo Universiteta. Seriya Fiziko-Matematicheskie Nauki;2024-01-12

4. Fault-Tolerant Routing in Networks-on-Chip Using Self-Organizing Routing Algorithms;IECON 2021 – 47th Annual Conference of the IEEE Industrial Electronics Society;2021-10-13

5. A new architecture for online error detection and isolation in network on chip;Journal of High Speed Networks;2020-12-23

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