A 3-Transistor DRAM Cell with Gated Diode for Enhanced Speed and Retention Time

Author:

Luk W.,Cai J.,Dennard R.,Immediato M.,Kosonocky S.

Publisher

IEEE

Cited by 9 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. An Energy-Efficient Gain-Cell Embedded DRAM Design with Weight Encoding for CNN Applications;2023 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA);2023-10-27

2. Exploring and analyzing the real impact of modern on-package memory on HPC scientific kernels;Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis;2017-11-12

3. BVF;Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture;2017-10-14

4. Gain-Cell eDRAMs (GC-eDRAMs): Review of Basics and Prior Art;Gain-Cell Embedded DRAMs for Low-Power VLSI Systems-on-Chip;2017-07-07

5. Design of Low Power Memristor Non-Volatile Dram Cell with Footer Switch;Proceedings of the Second International Conference on Information and Communication Technology for Competitive Strategies - ICTCS '16;2016

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