28nm FDSOI technology sub-0.6V SRAM Vmin assessment for ultra low voltage applications-Reference-Cited by-同舟云学术

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28nm FDSOI technology sub-0.6V SRAM Vmin assessment for ultra low voltage applications

Published:2016-06 Issue: Volume: Page:
ISSN:
Container-title:2016 IEEE Symposium on VLSI Circuits (VLSI-Circuits)
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Author:

Ranica R.,Planes N.,Huard V.,Weber O.,Noblet D.,Croain D.,Giner F.,Naudet S.,Mergault P.,Ibars S.,Villaret A.,Parra M.,Haendler S.,Quoirin M.,Cacho F.,Julien C.,Terrier F.,Ciampolini L.,Turgis D.,Lecocq C.,Arnaud F.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/7569797/7573453/07573512.pdf?arnumber=7573512

Cited by 5 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Analytical Model of SRAM VMin to Predict Reliability and Process Impact;2023 IEEE International Integrated Reliability Workshop (IIRW);2023-10-08

2. Single-Mode CMOS 6T-SRAM Macros With Keeper-Loading-Free Peripherals and Row-Separate Dynamic Body Bias Achieving 2.53fW/bit Leakage for AIoT Sensing Platforms;2022 IEEE International Solid- State Circuits Conference (ISSCC);2022-02-20

3. SRAM With Stability Monitoring and Body Bias Tuning for Biomedical Applications;IEEE Solid-State Circuits Letters;2022

4. SRAM Bitcell Functionality Under Body-Bias;Integrated Circuits and Systems;2020

5. Development of a Low Standby Power Six-Transistor CMOS SRAM Employing a Single Power Supply;IEICE Transactions on Electronics;2018-10-01

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