An adaptive reference generation scheme for 1T1C FeRAMs-Reference-Cited by-同舟云学术

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An adaptive reference generation scheme for 1T1C FeRAMs

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Container-title:2003 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.03CH37408)
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Author:

Chandler T.,Sheikholeslami A.,Masui S.,Oura M.

Publisher

Japan Soc. Appl. Phys

Link

http://xplorestaging.ieee.org/ielx5/8656/27435/01221193.pdf?arnumber=1221193

Cited by 5 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Sensing in Ferroelectric Memories and Flip-Flops;Sensing of Non-Volatile Memory Demystified;2018-08-11

2. A novel low-latency DRAM based on the bitline-discharge rate;International Journal of Electronics;2018-07-18

3. Time-Domain Readout of 1T–1C DRAM Cells;Journal of Circuits, Systems and Computers;2017-08-23

4. Circuit implementations of the differential capacitance read scheme (DCRS) for ferroelectric random-access memories (FeRAM);IEEE Journal of Solid-State Circuits;2004-11

5. An Investigation into Three-Level Ferroelectric Memory;2005 IEEE International Workshop on Memory Technology, Design, and Testing (MTDT'05)

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