Author:
Datta Debarshi,Akhtar Sahil,Dutta Himadri Sekhar
Cited by
6 articles.
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1. Dynamically Configurable FIR Filters Based on Serial MACs and Systolic Arrays;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19
2. Design of a Hardware Accelerator Supporting Dual-Mode FIR Filtering Based on the Rocket-Chip Platform;2023 3rd International Conference on Intelligent Communications and Computing (ICC);2023-11-24
3. Analysis of a novel FPGA-based system for filtering audio signals using a finite impulse response filters;International Journal of Electronics and Telecommunications;2023-07-26
4. High performance FIR Architecture for EOG Signal Noise Supression;2023 14th International Conference on Computing Communication and Networking Technologies (ICCCNT);2023-07-06
5. FPGA Implementation of Systolic FIR Filter Using Single-Channel Method;2023 13th International Conference on Cloud Computing, Data Science & Engineering (Confluence);2023-01-19