Performance Analysis of 10 nm FinFET with Scaled Fin-Dimension and Oxide Thickness-Reference-Cited by-同舟云学术

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Performance Analysis of 10 nm FinFET with Scaled Fin-Dimension and Oxide Thickness

Published:2019-04 Issue: Volume: Page:
ISSN:
Container-title:2019 International Conference on Automation, Computational and Technology Management (ICACTM)
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Author:

Dargar Shashi K.,Srivastava Viranjay M.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/8766340/8776675/08776710.pdf?arnumber=8776710

Cited by 6 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Analysis of Process Variation Within Clock Regions of AMD-Xilinx UltraScale+ Devices;Lecture Notes in Computer Science;2024

2. Impact of Oxide Thickness Fluctuation for Resist- and Spacer-Defined FinFETs;2022 IEEE Latin American Electron Devices Conference (LAEDC);2022-07-04

3. Regression Analysis of Static Noise Margin and Transconductance for Underlap Lengths of FinFET;2022 45th International Spring Seminar on Electronics Technology (ISSE);2022-05-11

4. Effect of Metal Gate Work Function Variation on Underlap FinFET;2022 45th International Spring Seminar on Electronics Technology (ISSE);2022-05-11

5. Analog/RF Performance Analysis of GAA-GNR Tunnel Field-Effect Transistor (TFET);Lecture Notes in Electrical Engineering;2022

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