Efficient VLSI Architecture for Edge Sensing Anti-Aliasing Demosaicing-Reference-Cited by-同舟云学术

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Efficient VLSI Architecture for Edge Sensing Anti-Aliasing Demosaicing

Published:2021-11-24 Issue: Volume: Page:
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Container-title:2021 IEEE International Conference on Integrated Circuits, Technologies and Applications (ICTA)
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Author:

Zhang Yangyi,Peng Zizhao,Yao Ruohen,Deng Huanshihong,Zhang Wenyue,Chen Lei,An Fengwei

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9661584/9661598/09661706.pdf?arnumber=9661706

Reference6 articles.

1. VLSI Implementation of an Adaptive Edge-Enhanced Color Interpolation Processor for Real-Time Video Applications

2. Higher Order Polynomial Demosaicing

3. An area-efficient color demosaicking scheme for VLSI architecture;shiau;Int J Innov Comput Inf Control,2011

4. Fully Pipelined Low-Cost and High-Quality Color Demosaicking VLSI Design for Real-Time Video Applications

5. Demosaicking methods for Bayer color arrays

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Hardware Efficient Edge-Detection Based Color Filter Array Interpolation for Industrial Cameras;2023 IEEE Industrial Electronics and Applications Conference (IEACon);2023-11-06

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